1. Field of the Invention
The present invention relates to the field of operational and instrumentation amplifiers.
2. Prior Art
One of the key performance specifications of an operational amplifier is its DC error or offset voltage. The offset voltage limits the ability of the amplifier to resolve small DC input voltages. The total offset voltage is usually specified assuming a single source of error at the input terminals. The value of this imaginary voltage source represents the input referred offset voltage of the amplifier. The significance of this parameter lies in the fact that the amplifier will not be able to resolve any DC voltages at its input that are smaller than the input referred offset voltage.
In monolithically integrated operational amplifiers, the input referred offset voltage (also called input offset, offset voltage or just offset for short) is mostly due to statistical mismatch between critical components in the circuit. Commonly, these critical components include the input stage transistors, but other devices may contribute significantly to the offset as well. Typical offset voltages due to component mismatch lie in the order of several millivolts.
In the past, many techniques have been proposed and implemented to limit the effect of statistical mismatch on the input referred offset voltage. These techniques fall into one of two categories (see “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization”, C. C. Enz and G. C. Temes, IEEE J. Solid-State Circuits, vol. 84, November 1996, pp. 1584-1614).
1. Chopper Stabilization
2. Autozeroing
The following will address each of these techniques, along with their respective advantages and disadvantages.
Chopper Stabilization
Chopper stabilization relies on periodically swapping the signal paths for the negative and positive input terminals of the amplifier. On average, this causes the offset between the two terminals to even out (see “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization”, C. C. Enz and G. C. Temes, IEEE J. Solid-State Circuits, vol. 84, November 1996, pp. 1584-1614). FIG. 1 shows the block diagram of a chopper stabilized amplifier.
The input referred offset voltage of the input stage gm1 is represented by voltage source Vos. The behavior of the choppers is to multiply their input signal by +1 or −1, depending on the state of clock phase φ2. In the case of a differential signal (e.g. chopper chop1), multiplying by −1 simply means swapping the input signals. Multiplying by +1 indicates direct connections between inputs and outputs.
Note how for one clock phase the input offset source Vos will cause a negative error voltage at the output, while for the other phase the effect will be a positive voltage. The net output error voltage, averaged over time, will be zero.
For the input signal the situation is different. In this case the signal passes to both choppers chop1 and chop2, and the polarity of the output signal will not change. Therefore, the output signal will consist of the unmodified input signal, and a ripple voltage caused by chopping by chopper chop2 of the input offset voltage Vos.
Alternatively, in the frequency domain the choppers chop1 and chop2 can be regarded as multipliers or mixers, shifting the input frequencies by the chopper frequency fchop. From this point of view, chopper chop1 will convert up a DC input signal to the chopper frequency fchop. Input stage gm1 will then amplify the resulting signal at fchop, while chopper chop2 converts the signal back to DC. Note that the DC input signal reappears as a DC signal at the output of chopper chop2. This is because at this point the signal has passed through two choppers, implementing up and down conversion of the input signal.
The situation for the offset source Vos is different, however. Since there is only one chopper between the offset source Vos and the output, the DC offset voltage Vos will get up converted to the chopper frequency fchop at the output. By low pass filtering (or averaging) the output the effect of the offset source Vos can then be eliminated.
Besides to the DC offset, the same frequency up conversion applies to any 1/f or low frequency noise of input stage gm1. Therefore, the 1/f noise is shifted out of the signal band in the same way the DC offset is.
The gain stages gm1, gm4 and gm5 comprise the chopped signal path. Since DC offset is—by definition—a low-frequency phenomenon, the chopped signal path does not require a very high bandwidth. Instead, the parallel input stage gm3 is added to the circuit to deal with high frequency signals. Together, input stages gm1 and gm3 handle the entire spectrum from DC up to the bandwidth of the amplifier. Capacitors Cm1 and Cm2 implement frequency compensation to ensure stability when applying feedback to the amplifier, as well as a smooth transition between the high and low frequency portions of the amplifier gain. This frequency compensation setup is based on Multipath Nested Miller Compensation (see “Frequency Compensation Techniques for Low-Power Operational Amplifiers”, R. Eschauzier and J. Huijsing, section 6.1, Boston, Mass.: Kluwer, 1995, section 6.1, Boston, Mass.: Kluwer, 1995).
A significant benefit of the chopping technique, besides its effectiveness in reducing offset and 1/f noise, is that the noise power density spectrum (PSD) at low frequencies approaches the thermal noise limit of the amplifier without choppers.
The main disadvantage of chopping is that the output spectrum of the chopper stabilized amplifier will show a sharp peak around the chopper frequency fchop (FIG. 2).
This noise peak is caused by the up conversion of the offset voltage and 1/f noise of the input stage gm1, and corresponds to the ripple voltage at the output of the amplifier in the time domain.
Autozeroing
Autozeroing includes techniques that calibrate out the input offset by measuring the offset, storing it into some kind of internal memory, and then compensating for the error during normal operation. This process is very similar to zeroing a weighing scale for example. The moment of calibration can be during manufacturing, in which case the measured offset needs to be stored onto a non-volatile memory, to ensure that the measured offset value does not disappear after the part is powered down. Alternatively, the autozeroing can be performed during normal operation, by periodically interrupting the signal path for a brief calibration. In this case, the measured voltage needs to be retained for a short amount of time only, allowing the use of volatile memory, or even a capacitor to store the value. The advantage of autozeroing during normal operation is that as the offset of the amplifier shifts, e.g. due to temperature changes or aging, the autozeroing will track the changes and continue to compensate for it. Autozeroing during manufacturing does not compensate for varying conditions, and is therefore susceptible to offset drift.
FIG. 3 shows the simplified block diagram of an amplifier using autozeroing to reduce its offset.
It comprises of input stage gm1 with its associated input referred offset voltage source Vos. The switches S1 and S2, transconductor gm2 and capacitor Ci implement the autozero function. When clock phase φ1 is high (autozero), switch S1 shorts the input terminals of input stage gm1. Switch S2 closes a feedback loop around stage gm2, which forces the output voltage of input stage gm1 to zero. After the feedback loop settles, the voltage on autozero capacitor Ci counteracts the input referred offset voltage Vos.
The moment clock phase φ1 goes low (normal operation), switch S2 opens the feedback loop around transconductor gm2. Because of the high input impedance of transconductor gm2, the voltage across the autozero capacitor Ci remains constant (sample-and-hold), and continues to compensate for the offset voltage Vos.
With clock phase φ1 low, input switch S1 goes from shorting out the input stage gm1 to directly connecting the input terminals of the amplifier to the input stage gm1. Input stage gm1 now operates as a normal input stage, connected between the input terminals of the amplifier and the subsequent gain stages gm4 and gm5. As a result of the calibration in the previous clock phase, the small current I2 that transconductor gm2 adds to the output current of input stage gm1 exactly compensates for the error current at the output of gm1 due to offset voltage Vos. In other words, the autozero current I2 effectively eliminates the input referred offset voltage Vos of the amplifier.
Besides eliminating DC offset, the autozero process is also very effective against low-frequency or 1/f noise. This noise component can be regarded as a slowly varying offset voltage, and as long as the amplifier is autozeroed with short enough intervals, any 1/f noise will be removed in the same fashion DC offset is.
The autozeroed amplifier in FIG. 3 separates high and low frequency signals and processes them through two parallel signal paths, as was the case with the chopper stabilized amplifier of FIG. 1. The gain stages gm1, gm4 and gm5 comprise the low-frequency autozeroed signal path, while the parallel input stage gm3 deals with high frequency signals. Capacitors Cm1 and Cm2 again implement Multipath Nested Miller Compensation (see “Frequency Compensation Techniques for Low-Power Operational Amplifiers”, R. Eschauzier and J. Huijsing, section 6.1, Boston, Mass.: Kluwer, 1995., section 6.1, Boston, Mass.: Kluwer, 1995), ensuring stability and a smooth frequency response.
Although autozeroing according to FIG. 3 is a simple and effective method to reduce the input offset, it greatly deteriorates the noise properties of the amplifier due to a process called wide-band noise sampling (see “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization”, C. C. Enz and G. C. Temes, IEEE J. Solid-State Circuits, vol. 84, November 1996, pp. 1584-1614).
Wide-band noise sampling, which is inherent to any sample-and-hold action, is caused by the fact that the instantaneous noise value at the output of input stage gm1 (and also autozero stage gm2) is sampled by autozero capacitor Ci and held for the entire period that φ1 is low (normal operation). The sampling of the noise takes place by switch S2 and capacitor Ci, which are both components with a bandwidth that far exceeds the bandwidth of the amplifier. Therefore, the noise is sampled with a very high bandwidth, which results in a corresponding high rms value (or standard deviation σ) of the sampled noise voltage in the time domain. As a result, the sampled voltage on autozero capacitor Ci at the end of each autozero period shows a significant random variation. This variation causes a random input referred offset voltage that changes at the end of each autozero interval, and is then kept constant throughout an entire period of normal operation.
In the frequency domain, this wide-band noise sampling causes an increase in the noise floor for low frequencies (see FIG. 4).
The corner frequency ωc of this elevated noise band is set by the bandwidth of the autozero loop through transconductor gm2, switch S2 and autozero capacitor Ci and equals gm2/Ci.
In the circuit of FIG. 3, there is also another, second, source of wide-band noise sampling. This is due to the sample-and-hold action of switch S2 and the integrating capacitor Cm2 during the autozero period. As a result, the noise floor beyond the corner frequency of the autozero loop will also be higher compared to the thermal noise limit of the amplifier without autozeroing. The bandwidth of this sampled noise spectrum is approximately equal to the frequency at which the amplifier is autozeroed (and lies beyond the maximum frequency on the X-axis of FIG. 4.)
The noise power spectral density (or PSD) of the overall amplifier is shown in FIG. 4. Due to the multiple sample-and-hold actions in the circuit, the overall noise density is significantly higher than the thermal noise limit of the circuit without autozeroing. For low frequencies, the noise increase is especially noticeable, and in practice can be a factor 10 or more. Note that compensating for this elevated noise level by lowering the thermal noise of gm1 (and gm2), would mean that the currents in these stages will have to go up by the same factor 10. In many cases such a large supply current increase will turn out to be an unacceptable impact to the total power budget of the amplifier.